FuryGpu – Custom PCIe FPGA GPU

Original Article ↗ Hacker News Discussion ↗

Scope and Intent of FuryGpu

  • FPGA-based PCIe graphics card with a custom fixed-function 3D pipeline, Windows driver, custom API, and Quake port.
  • Described as a hobby “toy,” not a commercial product or competitor to major GPU vendors.
  • Creator plans to open-source the full stack (HDL, PCB, drivers, API, Quake port) after resolving legal and licensing issues.

Architecture, Performance, and Limitations

  • Targets roughly mid‑1990s high‑end GPU features; no modern shader pipeline yet.
  • Uses a Xilinx Zynq UltraScale+–based Kria SOM; GPU cores run ~400 MHz, texture units ~480 MHz.
  • To reach 60 Hz, renders at 640×360 and upscales to 720p; even this can struggle at times.
  • Front end (through primitive assembly) uses fp32; heavy reliance on DSP slices, BRAM/URAM.
  • PCIe implemented via Xilinx hard IP plus an open-source verilog PCIe stack.
  • Porting to other FPGA families is possible but nontrivial due to dependence on specific DSP/BRAM behavior.

Tooling, Openness, and Related Projects

  • Discussion notes the broader lack of open hardware GPUs and open FPGA toolchains, especially for modern devices.
  • Mentions partial open-source flows for Lattice (iCE40, ECP5, Nexus), Gowin, Xilinx 7‑series, and GateMate.
  • Several open GPU/graphics projects are cited (fixed‑function, GPGPU, VGA cores, retro adapters, research GPUs).

Display, SoC Integration, and Firmware Role

  • Zynq/Kria chosen partly for hardened PCIe and DisplayPort IP tied to ARM cores.
  • Firmware on ARM configures DisplayPort, DMAs video/audio buffers, manages resolution changes, and handles auxiliary tasks (e.g., internal buffer setup, potential VGA fallback).

Modern GPU Feature Gap (DX/GL, Shaders)

  • Adding even baseline Direct3D support is described as very difficult: OS compositors assume decades of evolved features.
  • Implementing programmable shaders on FPGA at competitive clocks/parallelism is considered technically possible but likely too resource- and timing-constrained for more than proof‑of‑concept.

Cost, Accessibility, and Hobby Context

  • High-end FPGAs are expensive at distributor pricing, but dev boards and volume/secondary-market options can be much cheaper.
  • Kria dev boards (~$350) are seen as relatively good value for serious experimentation.
  • Many commenters see the project as inspiring, especially for hobbyists moving from breadboard CPUs/MCUs into FPGAs and custom graphics.