Why use ECC? (2015)

Original Article ↗ Hacker News Discussion ↗

Role and Value of ECC

  • Many commenters argue ECC should be the default in all computing, not just servers.
  • ECC is seen as critical for avoiding silent data corruption (“bitrot”), especially for databases, backups, and long‑lived data.
  • Several anecdotes describe dramatic data loss or corrupted backups traced to bad non‑ECC RAM; those users now pay a premium for ECC.
  • A 2024 note is cited that a significant fraction of Firefox crashes (10–20%) were due to memory corruption, reinforcing ECC’s value.

Cost, Performance, and Availability

  • ECC DIMMs theoretically need ~12.5–25% extra bits, but real‑world price premiums can be much higher due to “enterprise” positioning and limited supply.
  • DDR5 ECC options remain relatively expensive and often slower, with higher latency and lower peak speeds than popular non‑ECC kits.
  • Some say ECC builds are now easy; others report painful compatibility issues and binning problems, especially with older Xeon rigs.

Consumer Platforms and Support

  • Intel is criticized for restricting ECC to server/workstation lines, pushing consumer platforms without ECC.
  • AMD desktop support is seen as better but inconsistent: CPUs often support ECC “with motherboard support,” but ECC SODIMMs and clear guarantees are hard to find; newer Ryzen 8000 APUs reportedly drop ECC.
  • Small form factor devices (NUCs and similar) rarely support ECC; users are pointed toward mini‑ITX boards or used rack servers instead.

DDR5 On‑Die ECC vs “Real” ECC

  • DDR5’s on‑die ECC is described as a yield and reliability aid inside the chip, not a replacement for system‑level ECC.
  • It typically doesn’t expose error statistics, so you can’t see how often it is correcting faults.

CPUs, GPUs, and Other Reliability Mechanisms

  • Most CPUs already use ECC on caches; server CPUs may add opaque “RAS” features, but details are unclear.
  • GPUs without ECC are noted as error‑prone for general compute; some cards (e.g., high‑end RTX) can enable ECC, often with performance trade‑offs.
  • Cosmic‑ray‑induced soft errors are acknowledged, but some argue software bugs and over‑aggressive overclocking dominate real‑world crashes.

Alternatives and “Soft ECC” Ideas

  • One proposal: “soft‑ECC” via triplicated pages managed by the CPU/OS for critical code/data; others respond that it would be complex and slow, and proper hardware ECC is simpler.
  • There is agreement that ECC reduces, but does not eliminate, error risk; the remaining probability can be made negligible compared to other failure modes.