Base 3 Computing Beats Binary

Original Article ↗ Hacker News Discussion ↗

Claims that base‑3 (ternary) number systems are more “efficient” than binary, especially when measured by a radix‑economy metric that favors bases near the mathematical constant e, have revived interest in ternary computing. Commenters contrast this theoretical advantage with practical engineering realities: modern transistors, signaling, power consumption and noise margins are all heavily optimized for two voltage levels, making reliable multi‑level logic substantially harder and often less energy‑efficient. Historical ternary efforts like the Soviet Setun and modern multi‑level storage (e.g., multi‑bit NAND flash, PAM‑4 signaling) are cited as niche uses, but the consensus is that for general‑purpose computation binary remains the best trade‑off between information density, hardware complexity and reliability.

Mathematical optimal base vs. real hardware

  • Several comments re-derive the “optimal radix” result: minimizing base × digits leads to base = e using calculus; among integers, 3 is closest to e.
  • Related reformulation: minimizing x / log x over x > 1 gives minimum at x = e; base-3 is the best integer.
  • Some note that this “radix economy” is a toy cost function and ignores hardware realities.

Physical / engineering constraints of ternary

  • Major theme: ternary gains in information density (~1.58 bits per trit) are modest and often outweighed by:
    • Harder discrimination between 3 voltage/charge levels.
    • Greater susceptibility to noise and tighter tolerances.
    • Likely need for higher supply voltages and more power dissipation.
    • Increased implementation complexity for gates and adders.
  • Disagreement over whether ternary must use negative voltages; some argue three positive levels suffice, others stress that intermediate levels are still problematic.
  • Multiple comments emphasize that binary CMOS has been optimized for decades; designing fast, low-power multi-level logic at GHz is a different and harder problem.

Existing multilevel and “ternary-like” technologies

  • NAND flash already stores multiple bits per cell via multiple charge levels (SLC/MLC/TLC/QLC), but this is used only for storage, with binary interfaces and substantial analog and ECC overhead.
  • High-speed links (Ethernet PAM-5, PCIe PAM-4, USB PAM-3, high-order QAM) use multi-level signaling for bandwidth, but internal computation remains binary.
  • Tristate / Hi-Z buses and open-collector/collector systems are discussed as three-state at the electrical level but still fundamentally binary in logic.

History and myths about ternary computing

  • The Soviet Setun machine is cited as a real ternary computer, though one comment notes it encoded trits using binary pairs.
  • Claims that the USSR “bet on ternary and lost the space race” are widely dismissed as fabrication or exaggeration.

Programming, logic, and architecture issues

  • Ternary control flow would naturally have three-way branches; some see this as occasionally useful (e.g., < / = / >, true / false / error), but others think most real branches are still binary (e.g., loop exits).
  • Some speculate about richer “tritwise” operations and ternary-native data types, but concrete killer examples beyond density are not provided.
  • Discussion of minimal ternary gate sets and balanced ternary arithmetic shows theoretical richness but also practical complexity.

Critiques of the article and overall sentiment

  • Many readers view the article as overselling ternary, leaning on simplistic arguments like “more than yes/no.”
  • Core consensus: mathematically, ternary (and e) is elegant; practically, binary remains superior given current device physics, tooling, and cost models. Enthusiasm is mostly theoretical; skepticism dominates on engineering grounds.