80286 ATX mainboard based on the IBM 5170 AT PC

Project overview & goals

  • Thread discusses an ATX 80286 motherboard inspired by the IBM 5170 AT, now running reliably at 20 MHz.
  • The designer reverse‑engineered the AT, recreated missing logic (notably a PAL), and migrated much of the TTL “graveyard” into CPLDs for reliability and higher clock speeds.
  • Goal is to preserve AT technology in an openly documented, reproducible form, while pushing its performance and integrating modern techniques.
  • A follow‑on hybrid 286/486 board is planned, using FPGAs and modern RAM (e.g., DDR), with ambitions like “full‑speed” main memory comparable to cache.

Design choices & technical details

  • Original IBM separation of system bus and memory bus is retained conceptually; memory is moved to an ISA card by putting the memory bus on the slot.
  • Design uses SRAM instead of DRAM, eliminating refresh logic and aiming for zero wait states at the cost of higher RAM price.
  • Several legacy controllers (DMA, PIC, timer) are planned to be reimplemented in an FPGA due to sourcing issues.
  • An on‑board LAN chip appears to destabilize the system; it is recommended to omit it.
  • Some commenters critique signal‑integrity aspects (ground plane cuts, decoupling, clock routing) and ask for full KiCad sources.

Performance, memory, and bus considerations

  • Concerns are raised about placing RAM on the ISA bus; others note the board runs ISA synchronously at up to ~20 MHz, not the classic 8 MHz.
  • Debate over using ISA SRAM vs on‑board DRAM: SRAM simplifies design and timing but is expensive; DRAM would be cheaper but needs a controller.

Operating systems & CPU architecture

  • Curiosity about running old 286‑native OSes such as Xenix and Concurrent DOS; no definitive confirmation in the thread.
  • Extended discussion on why mainline Linux does not target the 286: lack of paging MMU and 16‑bit architecture, not absence of FPU.
  • Clarifications that 286 has segmentation but no paging; 386 added paging and is where Linux started.
  • Broader debate on segmentation vs flat address spaces, hardware task switching, and historical systems like Minix and PDP‑11 Unix.

Nostalgia and bus evolution

  • Many express fondness for ISA’s simplicity and jumper‑based configuration, despite IRQ exhaustion and DMA limitations.
  • PCI’s Plug and Play and message‑signaled interrupts are acknowledged as big improvements, but early PnP (especially ISA PnP) was unreliable.
  • Suggestions for modern tinkering include using SMBus/I²C and PCIe‑to‑PCI adapters; anecdotes highlight IRQ conflicts and debugging hassles.

Licensing discussion

  • The LICENSE file is GPLv3, but the README includes additional “not permitted” style language and usage limits (e.g., non‑commercial / safety‑oriented), which some see as conflicting with GPL and making reuse risky.
  • Others interpret the README mainly as disclaimers, not binding terms.
  • Several argue for a simpler, standard open‑hardware‑style license (e.g., CC‑BY‑SA, optionally with non‑commercial) plus clear warranty disclaimers.

Potential industrial relevance

  • One commenter notes that some critical infrastructure (e.g., a nuclear power station’s control systems) still uses 286‑based hardware, making high‑quality replacements potentially valuable, though certification requirements are a major barrier.