Japan bets $67B to become a global chip powerhouse once again

Original Article ↗ Hacker News Discussion ↗

Japan’s $67B push to revive advanced semiconductor manufacturing through Rapidus is seen as both a hedge against Taiwan-related supply risks and a bid to regain technological relevance in a field now dominated by TSMC, Samsung and ASML. Commenters debate whether such an effort can realistically reach 2nm mass production by 2027 given the extreme complexity, talent demands and reliance on foreign lithography tools, while noting Japan’s historical strength in precision manufacturing. The conversation situates this move within a broader global arms race in chips—driven by AI, U.S. export controls on China, and large state subsidies—that may ultimately produce excess capacity but is treated by governments as a strategic necessity.

Japan’s $67B Bet and Rapidus Feasibility

  • Plan: Japan-backed Rapidus aims to mass-produce 2 nm logic chips around 2027, starting effectively from zero leading-edge capacity.
  • Many see it as bold but unrealistic on that timeline; some compare to ASML’s ~20-year EUV journey and Intel’s long struggle to catch up.
  • Others argue that once a path is proven, catching up can be much faster, especially for a tech-heavy country like Japan with existing semiconductor know‑how and ASML support.

Geopolitics and Supply-Chain Diversification

  • Investment seen as:
    • A hedge against disruption of Taiwan/TSMC (war or sanctions).
    • A response to US export controls on China and prior losses for Japanese equipment suppliers.
  • Some argue multiple national hubs (US, Japan, EU, others) are needed for security, even if economically inefficient.

China, Sanctions, and Tech Catch-Up

  • Strong debate on sanctions:
    • One side: sanctions slowed China’s access to high-end tools, pushing true leading-edge nodes “decades away.”
    • Other side: sanctions created a captive domestic market, accelerating Chinese toolmakers and fabs (e.g., reported 7 nm phones, progress toward 5 nm despite poor yields).
  • Consensus: China will eventually reach high-end nodes; timing (few years vs decades) is disputed.

Tooling, Canon/Nikon, and ASML Monopoly

  • Historical note: US national lab EUV IP was licensed to some firms but not Japanese leaders; via acquisitions, ASML became sole industrial EUV provider.
  • Canon is pursuing a 5 nm “stamp” lithography approach; seen as promising but currently too slow for high-volume production.

Economics, Labor, and Overcapacity Risk

  • $67B roughly equals a handful of top-tier fabs plus tools.
  • Some predict a severe chip glut once US/EU/Japan/China/India subsidies all manifest, leading to ongoing bailouts or failed fabs.
  • Labor:
    • Taiwan/South Korea seen as having harsher fab work cultures than today’s Japan.
    • Cleanroom work is described as exhausting; automation is widespread but cannot remove humans.

AI and Demand Outlook

  • Many expect AI and custom accelerators (from hyperscalers and others) to justify massive global capacity increases.
  • Others question how much truly needs cutting-edge nodes versus “good enough” older processes, especially given power and cost constraints.

Learning Resources Frequently Mentioned

  • Book: Chip War (widely recommended).
  • Media: podcasts and YouTube channels covering TSMC, ASML, and semiconductor history/tech.