AMD's Strix Point: Zen 5 Hits Mobile

Original Article ↗ Hacker News Discussion ↗

AMD’s new Strix Point mobile chips (Zen 5) are being measured against Apple’s M‑series and Qualcomm’s Snapdragon X Elite for performance per watt, battery life, and real‑world laptop behavior. Commenters argue over how much credit belongs to ARM vs x86 instruction sets, chip architecture, and TSMC process nodes, noting that benchmarks like Cinebench can skew results and that OEM power limits and cooling profiles heavily shape perceived efficiency. Broader themes include how often x86 laptops chase headline performance at the expense of noise and battery life, and whether added blocks like NPUs are worthwhile for typical users.

Perf/Watt and Battery Life Comparisons

  • Strix Point / Ryzen AI 9 HX370 is seen as a major step for x86 mobile: in some reviews its battery life comes within ~1–2 hours of M3 MacBook Pro and Qualcomm Snapdragon X Elite machines.
  • Disagreement over how efficient it really is:
    • Some cite Cinebench/Notebookcheck data showing M3 (and Snapdragon X Elite) with clearly higher perf/watt, especially in single-threaded loads.
    • Others argue those reviews often use wall-power (including dGPU, screen, etc.) or vendor‑boosted TDPs (e.g., 80 W) that exaggerate x86’s inefficiency; CPU‑only measurements around 30–33 W make HX370 look much closer.
  • Several note that vendors often push laptop CPUs to high power points to win benchmarks, sacrificing efficiency; at ~15–30 W, recent Ryzen parts can be very efficient.
  • Battery life also depends heavily on OEM design (battery size, display, dGPU, firmware, OS power management), not just CPU.

ARM vs x86 Efficiency and ISA Debate

  • One camp: ARM (esp. Apple and Qualcomm designs) is inherently more efficient; they highlight large ST perf/watt gaps (e.g., M3 being multiple times more efficient than Zen 5 in Cinebench R24 ST).
  • Counter‑camp: ISA and x86 decoding overhead contribute only a small share of total power; most of the gap comes from process node, microarchitecture, and whole‑stack optimization.
  • Long subthread on:
    • Decoder complexity, micro‑op caches, instruction length and code density (x86 vs ARM64 vs RISC‑V).
    • Memory models and atomics (TSO on x86 vs weaker models on ARM).
    • Conclusion is mixed: ISA quirks do matter, but they don’t fully explain observed gaps.

Benchmarks and Methodology Disputes

  • Cinebench R23 is criticized as biased toward x86 (Intel Embree AVX code, weak NEON usage); R24 and Geekbench 6 are preferred for cross‑ISA comparisons.
  • Some argue Cinebench (especially ST) is an odd proxy for “real‑world” single‑thread performance; others defend it as realistic for rendering workloads.
  • There’s broad agreement that perf/watt must be compared at the same power point; raw “points per watt” without context can be misleading.

Laptop Design, Fans, and User Experience

  • Multiple comments argue that OS‑level controls (fan‑speed or max‑power sliders) would better align user preferences (quiet vs peak performance) with OEM tuning.
  • Thin, fanless designs (MacBook Air‑class) are highly valued by some; others prefer thicker, actively cooled laptops and are willing to tolerate fan noise.
  • Many note that idle and low‑load efficiency plus proper platform power management (BIOS, drivers, discrete GPU power‑gating) dominate perceived battery life.

Products, Form Factors, and NPUs

  • Interest in Zen 5 mini‑PCs and the upcoming Strix Halo (more cores, bigger iGPU, higher bandwidth) for console‑like small systems.
  • Questions about always‑on NPUs: some doubt typical software will exploit them and resent paying silicon area for features they may never use.