ESP32-S31

Original Article ↗ Hacker News Discussion ↗

Espressif’s new ESP32-S31 microcontroller is drawing interest for bringing dual-core RISC‑V, SIMD, single‑precision FPU, Wi‑Fi, Bluetooth LE Audio, gigabit Ethernet, CAN‑FD and rich motor‑control peripherals into a single, relatively low‑cost chip. Commenters highlight easier toolchains (especially for Rust), the potential for edge AI, audio and LED projects, and better interrupt and crypto support compared to earlier ESP32 generations. At the same time, they note trade‑offs such as limited external RAM, closed Wi‑Fi firmware, uneven Bluetooth audio support and concerns over naming, long‑term software support and reliance on China‑made silicon.

Architecture & ISA

  • Strong enthusiasm that ESP32-S31 uses RISC‑V, seen as better for open tooling than Xtensa.
  • The core supports RV32IMAC (integer, multiply/divide, atomics, compressed), with additional messy “Z*” style extensions discussed more generally for RISC‑V complexity.
  • Some lament the move away from Xtensa, which is described as elegant, but acknowledge RISC‑V’s licensing and ecosystem benefits.
  • Clarified that Espressif’s S/C/P naming refers to product category, not ISA; S31 shows Espressif is now “all‑in” on RISC‑V.

SIMD, FPU & “AI” Claims

  • S31 has SIMD on one HP core and single‑precision FPU on both HP cores. SIMD is said to be compatible with ESP32-P4 rev 3.x and evolved from S3.
  • Some disappointment that only one core has SIMD and SIMD details are still largely undocumented; people rely on esp-nn / esp-dsp sources.
  • Edge AI/ML claims are viewed skeptically: vision transformers / “Depth Anything” scale models are considered unrealistic here.
  • Consensus: small, quantized CNNs and audio tasks (wake word, simple classification like “cat on keyboard”) are plausible; memory is the main limiter.

Peripherals, Motor Control & Timing

  • Appreciated features: CAN‑FD, multiple MCPWM blocks (4), Bitscrambler peripheral (PIO‑like), FPU, crypto accelerators (SHA, AES, ECC, RSA, ECDSA).
  • Concern that ADC conversion time may be ~10 µs (based on other ESP parts), too slow for some advanced motor control strategies that need ≲1 µs and very tight control‑loop latency.
  • Extensive sub‑discussion on field‑oriented control, current sensing schemes, loop stability, and practical switching frequency limits.

Networking & Protocols

  • Big plus: integrated Wi‑Fi + BLE 5.4 (with LE Audio / LC3) plus gigabit Ethernet MAC (via external PHY). Use as router/VPN endpoint deemed theoretically possible but likely throughput‑limited.
  • Wired Ethernet uses RMII/RGMII via dedicated pins and an external PHY + magnetics.
  • Z‑Wave support deemed impossible here due to frequency and licensing; Zigbee/Thread mentioned as more natural fits on other Espressif parts.

Tooling, Ecosystem & Use Cases

  • Rust ecosystem praised: standard RISC‑V targets, official Espressif Rust HAL, active vendor participation.
  • People are excited for WROOM modules and dev boards (some already on AliExpress), using S31 as a “new default” ESP32 replacement for hobby and low‑volume products.
  • Use cases mentioned: LED art (WLED), multimedia/HDMI‑style pixel crunching, audio experiments, TLS‑enabled IoT with hardware crypto.

Concerns: Openness, Blobs & Naming

  • Wi‑Fi/BT stacks still rely on closed blobs; open MAC work exists but not complete.
  • Some worry about China‑based manufacturing and supply‑chain or security risks; others see all large vendors as similarly untrustworthy.
  • Many criticize the “ESP32-*” naming sprawl as confusing, though others note this mirrors STM32‑style family branding and signals ESP‑IDF compatibility.