Lichee Console 4A – RISC-V mini laptop: Review, benchmarks and early issues

Original Article ↗ Hacker News Discussion ↗

Early hands-on reports of the Lichee Console 4A, a RISC‑V–based mini laptop, highlight a mix of promise and immaturity: performance roughly in Raspberry Pi 3–4 territory, high idle power draw, rough hardware/thermal design, and fragile software support, especially around GPUs and browsers. Commenters debate whether RISC‑V meaningfully advances hardware “freedom” given proprietary blobs, Chinese-made SoCs, and missing drivers, while noting that mainstream distros like Debian are close to usable and toolchains are improving. Many conclude it’s an important step toward open, low-cost RISC‑V computing, but recommend cheaper SBCs or ARM/x86 UMPCs for most users until more performant and polished RISC‑V platforms such as SG2380-based boards arrive.

Overall sentiment

  • Thread sees the Lichee Console 4A as a symbolic milestone: a real RISC‑V laptop/UMPC, but clearly a prototype with rough edges.
  • Many like it as a “step on the path,” but emphasize it is not yet a practical daily‑driver.

Openness and “freedom”

  • Open ISA ≠ open hardware: commenters stress most current RISC‑V SoCs still use proprietary bits (SDRAM controller configs, firmware, GPU drivers).
  • Doubts about chips designed and manufactured in China: concerns about blobs, license/patent issues, and possible backdoors.
  • Bare‑metal boot on RISC‑V is simpler than x86, but a fully blob‑free, libreboot‑like stack is considered unlikely today due to DRAM and GPU components.
  • Debate over whether DRAM “training” data counts as a blob if it’s configuration rather than executable code.

Performance and software maturity

  • CPU performance is roughly in Raspberry Pi 3–4 territory: one benchmark shows Lichee between Pi 3 and Pi 4 in CoreMark.
  • Some users report it feeling slower than rival JH7110 boards in real workloads (e.g., GCC builds), possibly due to smaller caches or software/driver issues.
  • Disagreement over compiler quality: some argue RISC‑V GCC/Clang tuning and vector support lag x86/Apple; others claim codegen is already quite good, with specific issues (e.g., unaligned access assumptions) being fixed.
  • JavaScript JIT support (V8) on RISC‑V exists but is not at the same maturity as x86/ARM.

Graphics and multimedia

  • GPU support is a major weak point across RISC‑V SoCs: often software rendering only, or broken 3D, making GUIs sluggish.
  • For PowerVR variants, Vulkan support is in Mesa, with OpenGL/CL/GLES via Zink; kernel DRM support for specific RISC‑V SoCs is still incomplete, so nothing “just works” yet.

Power use and hardware design

  • Idle power and battery life are widely criticized; some x86 laptops idle at lower power despite larger size.
  • Suspected culprits include always‑on USB 3 hub chips and inefficient regulators; lack of proper link‑power‑management is mentioned.
  • The SoC is underclocked and seems repurposed from non‑laptop designs; the laptop itself is effectively stacked boards rather than an integrated design.

Alternatives, connectivity, and price

  • Strong sentiment that ~€420 / ~$430 is high given performance and maturity; used x86 UMPCs or small new Intel N100 laptops are seen as better value.
  • For experimenting with RISC‑V, several suggest cheaper SBCs (e.g., JH7110‑based boards, MangoPi, Milk‑V Mars) instead of a full laptop.
  • Frustration over eMMC and limited PCIe: users want at least one PCIe lane for NVMe; others note high‑speed SERDES cost/power and market targeting constrain cheap SoCs.
  • Some prefer JH7110‑based boards for better upstream support and PCIe, despite slightly lower peak CPU performance.

RISC‑V ecosystem and future outlook

  • Debian RISC‑V support is described as “about there”; most open‑source packages build, though proprietary/x86 binaries won’t run without emulation.
  • Discussion of future SoCs (e.g., SG2380‑based “Oasis” board) generates excitement: promises many higher‑end RISC‑V cores, standard vector extensions, desktop‑class performance, and better I/O.
  • Debate over whether RISC‑V can “catch up” with ARM: some argue ARM’s head start and pace make it hard; others see RISC‑V’s open licensing and fast recent progress as disruptive, especially if high‑performance designs and leading processes become available.