AMD Unveils Ryzen 9000 CPUs for Desktop, Zen 5

Original Article ↗ Hacker News Discussion ↗

Performance, Power, and Efficiency

  • 9900X drops TDP from 170W (7900X) to 120W; several comments note prior Zen 4 already lost little performance when power‑limited, implying headroom from aggressive stock settings.
  • Many argue the last ~10% of all‑core clocks costs disproportionate power; undervolting/eco modes are popular.
  • 15% IPC uplift over Zen 4 is seen as “good but not exciting,” especially given ~2‑year gap and reuse of the same TSMC N4 node, IO die, socket, and basic platform.
  • Some welcome similar or better performance at lower TDP; others view it as conservative, leaving room for Intel Arrow Lake to catch up.

Apple / ARM vs x86 Debate

  • Strong thread on Apple Silicon leading in single‑thread and laptop efficiency; some claim 2–4× perf/W over Zen 4 mobile and expect M4 to widen the gap vs Zen 5.
  • Others counter that in multi‑threaded desktop workloads (e.g., Blender, Cinebench, Geekbench clang), high‑core-count Ryzen and Threadripper still win outright or on price/perf.
  • Disagreement over how meaningful Geekbench, Cinebench, Passmark, SPEC, and real‑world compile/build tests are; consensus that workload‑specific benchmarks matter more than single synthetic scores.

Integrated GPU and Use Cases

  • Built‑in RDNA2 iGPU is considered minimal for gaming but widely seen as sufficient for office, media, multiple 4K displays, and troubleshooting without a dGPU.
  • Some emphasize it enables GPU passthrough, low‑noise systems, and cheaper homelab/home server builds.

Platform: IO, PCIe, Memory

  • AM5/X870E lane allocation discussed in detail; CPU exposes 28 PCIe 5.0 lanes, typically 16x GPU, 8x NVMe, 4x to chipset, plus USB4 from CPU or chipset depending on board.
  • Complaints that memory channel width (dual‑channel DDR5) and bandwidth remain unchanged; curiosity about quad‑channel or HEDT‑like options.
  • Many note mainstream AM5 boards now commonly support 128–192GB RAM; some argue older server/Epyc gear is attractive for very high RAM builds.

AVX‑512 and Compute

  • Zen 5 doubles L1 bandwidth and AVX‑512 throughput vs Zen 4, aiming to match or exceed Intel server AVX‑512 in many cases.
  • Clarifications that Zen 4 already could issue two 512‑bit ops per cycle via 256‑bit units; Zen 5 moves to full‑width 512‑bit datapaths and wider cache pipes.
  • Users interested in AI and numerics see this as important; others note most real‑world code uses little SIMD, limiting practical gains.

SoCs, Unified Memory, and AI Future

  • Some expect PCs to move toward Apple‑style or console‑style unified memory and higher on‑package bandwidth, especially for AI workloads.
  • Others defend modular desktops for upgradability and cost; skepticism that LLM‑centric designs should dictate mainstream PC architecture.

Fabs, TSMC, and Geopolitics

  • Discussion on AMD not using TSMC 3nm: likely due to cost and capacity constraints; Apple/Nvidia are presumed to dominate early 3nm supply.
  • Broader concern that much of high‑end CPU/GPU production depends on a few fabs (TSMC, Samsung, Intel) and ASML EUV tools; some worry about Taiwan security and economic shocks, others cite ongoing fab diversification in US/Japan.

User Upgrade Sentiment

  • Mixed reactions: some see Zen 5 as a good trigger to build or upgrade, others will buy discounted Zen 4 / AM4 or wait for Zen 5 X3D, Strix/Halo mobile parts, or DDR5/CAMM2 to mature.